I/O, Clocking, and Reference

Inputs and Outputs

SDI I/O

ARC can access any of the eight audio pairs carried on an incoming HD- or SD-SDI stream and provide de-embedding and pair shuffling at its input.

Note: ARC will not generate SDI video signals, so in order for the unit to output an SDI signal, it must receive one.

An SDI video delay is provided to compensate for the latency incurred by the audio processing within ARC and to ensure proper A/V sync at the embedded output. Detailed latency measurements are provided in the Detailed Setup and Configuration section.

ARC can simply pass through unprocessed audio from the input and/or route loudness controlled (processed) audio for two program sources to the embedded SDI output. The output channel mapping can mirror the input channels or be pair shuffled as needed.

AES-3 I/O

Audio received via the AES-3 input can be processed and sent to the AES-3 output, routed to the embedded SDI output, or sent to the AES67 output.

AES67 I/O

Any visible and accessible AES67 networked audio source can be processed by ARC and returned to the network via AES67, embedded into the SDI output, and/or sent to the AES-3 output.

Mixing and Matching Inputs and Outputs

It is possible to mix and match input sources and route the processed audio from those sources to the same or different outputs. For example, both program sources may come in as SDI and be re-embedded to SDI. Or, one source may arrive via SDI and the other via AES-3 or AES67, then be embedded to the SDI output or sent back to the network as AES67 audio.

Reference Clocking and Sample Rate Converters

Because ARC’s signal routing is so flexible and it supports multiple input and output formats, having a firm grasp of the clock sync (reference) requirements is critical. Some basics to remember:

Sample Rate Converters (SRCs) are provided on the SDI input, SDI output, and AES-3 input; the AES-3 output is always synced to the active reference clock. There are no SRCs in the AES67 path.

Reference clock source options include:

• Internal 48kHz

• SDI Input

• AES-3 Input

• PTP v2 per AES67-2015

When all input sources are SDI and the outputs are routed to the embedded SDI output, the reference signal present on the SDI input must be used

When using AES-3 I/O, ARC can be referenced to either the AES-3 clock (using the SRCs in the SDI path) or to the SDI clock (using the SRCs in the AES-3 path)

When using an AES-3 source without an accompanying reference, ARC’s 48kHz internal clock can be used as the system reference if necessary, providing the SRC on the AES-3 input is enabled

Whenever AES67 audio is used either on the input, the output, or both, ARC must slave to an externally-generated PTP clock as it cannot generate its own; details on PTP settings are provided in the Remote User Interface section.

Important: All audio pairs are de-embedded at the input and then re-embedded at the output when using the SDI I/O. While ARC accepts only PCM audio for processing, if there is any coded audio present on any of the SDI audio pairs, the SDI SRCs must be turned off as the coded audio bitstream will become corrupted if passed through an SRC.