Signal Routing and Reference Clock Basics

Inputs and Outputs

SDI I/O

SDI AoIP Node can access any of the eight audio pairs carried on each of the two available incoming HD- or SD-SDI streams, pair shuffle to the two HD- or SD-SDI outputs, or route audio to an AoIP stream.

AES67 I/O

Incoming AES67 audio sources can be embedded to an SDI output, and embedded SDI outputs can in turn be sent out as AES67 streams.

Reference Clocking and Sample Rate Converters

Having a firm grasp of clock sync (reference) requirements is critical to the successful operation of the SDI AoIP Node.

Sample Rate Converters (SRCs) are provided on each of the two SDI input and output paths. There are no SRCs in the AES67 path.

Reference clock source options include:

• Internal 48kHz

• SDI Input 1

• SDI Input 2

• PTP v2 per AES67-2015

If the SDI AoIP Node is used strictly for the purpose of pair shuffling between SDI inputs and outputs, it can be clocked to the reference present on either SDI input signal.

When AES67 is used either on the input, the output, or both, it must slave to an externally-generated PTP clock as it cannot generate its own; details on PTP settings are provided in the Network Configuration section.

Important - All SDI audio pairs are de-embedded at the input and then re-embedded at the output when using SDI I/O. If there is any coded audio present on any of the SDI audio pairs, the SDI SRCs must be turned off as the coded audio bitstream will become corrupted if passed through an SRC.